1. Field of the Invention
This invention relates generally to the field of tuning circuits. More particularly, the present invention relates to tuning circuits for tuning filter circuits over process, voltage, and temperature variations.
2. Description of the Related Art
Modem integrated circuit (IC) chips often contain filter circuits to remove unwanted signals. For example, in video signal processing, anti-alias filters are frequently used prior to digitization of a continuous-time analog signal to eliminate unwanted noise components from distorting the base-band signal of interest. The anti-alias filters for video signal processing applications typically contain an array of capacitors having a set of binary weighted capacitor values in parallel with a large fixed portion. The capacitor array is effectively a capacitor digital-to-analog (DAC) for converting digital signals into analog counterparts.
In conventional filters, the capacitor DACs are generally used with one or more resistors in a resistor-capacitor (RC) filter configuration. As is well known in the art, the use of capacitors and resistors on a single chip commonly produces RC product shifts due to variations in process, voltage, and/or temperature. For example, the capacitors and resistors in a filter are typically not fabricated exactly to the specification on a chip due to variations in process inherent during the manufacturing process. Likewise, variations in supply voltages in a chip affect the RC product shifts. Similarly, an IC chip generates heat during operation thereby shifting the RC product value.
As can be appreciated, such variations in RC product adversely affect the performance of the filters. In particular, the active RC filter cut-off frequency inversely follows the RC product of the passive filter elements. Normal variations of the filter resistors and capacitors may result in RC product shifts greater than xc2x150%. Such shifts in the RC product results in variation of filter cutoff characteristics, thereby leading to unstable and often unpredictable results. To compensate for the RC product shifts caused by variations in process, voltage, and/or temperature, conventional techniques have typically tuned the capacitor DACs in the filters by using complex and costly software and/or hardware.
In view of the foregoing, what is needed is a circuit and a method for automatically tuning RC circuits to provide constant RC characteristics over variations in process, voltage, and temperature.
Broadly speaking, the present invention fills these needs by providing a circuit and a method for automatically tuning filter circuits to provide constant RC characteristics over variations in process, voltage, and temperature. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device, or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, the present invention provides a circuit for tuning a filter circuit to compensate for variations in process, voltage, and temperature. The filter circuit includes one or more N-bit capacitor arrays. The circuit includes calibration circuitry and tuning circuitry. The calibration circuitry includes a resistor and a capacitor array that has at least N capacitors, which are configured to receive N input data bits. The capacitor array preferably includes 2N capacitors, but may have as low as N binary weighted capacitors. Each of the N capacitors is associated with an input data bit. The calibration circuitry is configured to integrate an input voltage signal in response to the input data bits to generate an output signal for tuning each of the capacitors. The tuning circuitry is coupled to provide the input data bits to the calibration circuitry for tuning the capacitor array and is configured to sequentially tune the N capacitors in response to the output signal by determining and setting a data bit value for each of the N capacitors. The tuning circuitry provides the tuned data bit value to the associated capacitor for tuning the other remaining capacitors. When all data bits have been tuned, they are provided to the filter circuit to compensate for variations in process, voltage, and temperature.
In yet another embodiment, the present invention provides a method for compensating for variations in process, voltage, and/or temperature in a circuit having a resistor and one or more N-bit capacitor arrays. The method includes: (a) providing calibration circuitry having an N-bit capacitor array coupled and a resistor, the N-bit capacitor array having a set of capacitors, wherein the set of capacitors has N subsets of capacitors with each subset being associated with an input data bit; (b) providing an input voltage signal and N input data bits to N-bit capacitor array, one input data bit for each of the N subsets of capacitors; (c) integrating the input voltage signal in response to the input data bits to generate an output signal for tuning each of the capacitors; and (d) successively tuning the N subsets of capacitors in response to the output voltage signal by determining and setting a data bit value for each of the N subsets of capacitors, wherein when the data bit has been tuned for the associated subset of capacitors, the tuned data bit value is provided to the associated subset of capacitors for tuning the other remaining subsets of capacitors. The capacitor array preferably includes 2N capacitors, but may have as low as N binary weighted capacitors.
In yet another embodiment, a method is provided for tuning a filter circuit to compensate for variations in process, voltage, and/or temperature. The filter circuit includes a capacitor array, which includes at least N capacitors and is coupled to a resistor. Each of the N capacitors is associated with an input data bit. In this method, an input voltage signal and N input data bits are provided to N-bit capacitor array, one input data bit for each capacitor. The input voltage signal is integrated in response to the input data bits to generate an output signal for tuning each of the capacitors. The N capacitors are successively tuned in response to the output voltage signal by determining and setting a data bit value for each of the N capacitors. When the data bit has been tuned for the associated capacitor, the tuned data bit value is provided to the associated capacitor for tuning the other remaining capacitors.
Preferably, the data bits are successively tuned using a successive approximation method from the most significant bit to the least significant bit. By successively setting the data bits from the most significant to the least significant bits, the voltage range of the integrated output signal is successively narrowed by bisection until the target voltage is reached at the end of the integration time, tref. The tuned data bits thus generated effectively provides constant RC product so that the performance of the filter circuits is substantially independent of process, voltage, and temperature. Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.